Field Programmable Gate Array (FPGA) with 150,848 logic cells and 5,994 Kbit RAM. Features 320 18x18 multipliers and operates at 437.5MHz with 65nm process technology and 1.2V voltage. Supports up to 413 user I/Os and offers external memory interfaces for DDR2 SDRAM and QDRII+ SRAM. Packaged in a 780-pin FBGA (29x29mm) for surface mounting, with a 1mm pin pitch.
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Intel EP3CLS150F780C7N technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 780 |
| PCB | 780 |
| Package Length (mm) | 29 |
| Package Width (mm) | 29 |
| Package Height (mm) | 1.75 |
| Seated Plane Height (mm) | 2.25 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034AAM-1 |
| Family Name | Cyclone® III LS |
| Maximum Number of User I/Os | 413 |
| RAM Bits | 5994Kbit |
| Device Logic Cells | 150848 |
| Process Technology | 65nm |
| Number of Multipliers | 320 (18x18) |
| Programmability | No |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Speed Grade | 7 |
| Differential I/O Standards Supported | LVPECL|LVDS|HSTL-18|HSTL-15|HSTL-12|SSTL-2|SSTL-18|RSDS |
| Single-Ended I/O Standards Supported | LVTTL|LVCMOS|PCI|PCI-X|SSTL|HSTL |
| External Memory Interface | DDR2 SDRAM|QDRII+SRAM |
| Device Number of DLLs/PLLs | 4 |
| Supported IP Core | Viterbi Compiler, Low-Speed/Hybrid Serial Decoder|Public Key Crypto Engine (BA414E)| 32|64-bit PCI-X bus Master/Target interface Core, 66/100/133Mhz |
| Supported IP Core Manufacture | Altera/CAST, Inc/Barco Silex/PLDA |
| Total Number of Block RAM | 666 |
| Cage Code | 4BA62 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU |
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