EP4CGX110BF31C7N

Field Programmable Gate Array (FPGA) with 109,424 logic cells and 5,490 Kbit RAM. This device features 60nm process technology, 8 transceiver blocks operating at 3.125 Gbps, and 2 Ethernet MACs. It supports a wide range of differential and single-ended I/O standards, including B-LVDS, HSTL, LVPECL, LVTTL, and LVCMOS, with 475 maximum user I/Os. The FPGA is housed in an 896-pin FBGA package with a 1mm pin pitch, suitable for surface mounting. It also includes 280 multipliers (18x18) and 1 PCI block, with support for DDR2 SDRAM and QDRII+ SRAM external memory interfaces.