EP4CGX50DF23I7N

Field Programmable Gate Array (FPGA) with 49,888 logic cells and 2502 Kbit RAM. This device features 60nm process technology, 290 user I/Os, and 8 transceiver blocks operating at 3.125 Gbps. It includes 2 Ethernet MACs, 1 PCI block, and 140 18x18 multipliers. The FPGA is housed in a 484-pin Fine Pitch Ball Grid Array (FBGA) package for surface mounting, with a pin pitch of 1mm and dimensions of 23mm x 23mm x 2.2mm. It supports various I/O standards including LVTTL, LVCMOS, HSTL, and LVDS, and interfaces with DDR2 SDRAM and QDRII+ SRAM.