Complex Programmable Logic Device (CPLD) featuring 980 macrocells and 127 logic elements, built on 0.18um process technology. This device offers 1270 logic cells and 212 user I/Os, operating at a maximum frequency of 201.1MHz. It supports dual supply voltages of 2.5V and 3.3V, with a minimum operating voltage of 2.375V. The CPLD is housed in a 256-pin Fine Pitch Ball Grid Array (FBGA) package, measuring 17x17x1.25mm, designed for surface mounting. Operating temperature range is -40°C to 100°C, with in-system programmability.
PackageFBGA
MountingSurface Mount
Quick Jump:
Technical Specifications
Intel EPM1270F256I5NES technical specifications.
General
Basic Package Type
Ball Grid Array
Package Family Name
BGA
Package/Case
FBGA
Package Description
Fine Pitch Ball Grid Array
Lead Shape
Ball
Pin Count
256
PCB
256
Package Length (mm)
17
Package Width (mm)
17
Package Height (mm)
1.25
Seated Plane Height (mm)
1.75
Pin Pitch (mm)
1
Package Material
Plastic
Mounting
Surface Mount
Jedec
MS-034AAF-1
Family Name
MAX® II
Device Logic Cells
1270
Number of User I/Os
212
Number of Logic Blocks/Elements
127
Number of Macro Cells
980
Program Memory Type
Flash
Process Technology
0.18um
Min Operating Temperature
-40°C
Max Operating Temperature
100°C
Typical Operating Supply Voltage
2.5|3.3V
Min Operating Supply Voltage
2.375V
Programmability
Yes
In-System Programmability
Yes
Speed Grade
5
Compliance
Cage Code
4BA62
EU RoHS
Yes
HTS Code
8542390001
Schedule B
8542390000
Automotive
No
AEC Qualified
No
PPAP
No
Radiation Hardening
No
RoHS Versions
2011/65/EU
Datasheet
Intel EPM1270F256I5NES Datasheet
Download the complete datasheet for Intel EPM1270F256I5NES to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.