Complex Programmable Logic Device (CPLD) featuring 192 macrocells and 240 device logic cells, built on 0.18um process technology. Operates at a typical supply voltage of 1.8V, with a minimum of 1.71V, and supports in-system programmability. This surface-mount device is housed in a 100-pin TQFP (Thin Quad Flat Package) with gull-wing leads, measuring 14mm x 14mm x 1mm, and offers 80 user I/Os.
PackageTQFP
MountingSurface Mount
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Technical Specifications
Intel EPM240GT100C5NES technical specifications.
General
Basic Package Type
Lead-Frame SMT
Package Family Name
QFP
Package/Case
TQFP
Package Description
Thin Quad Flat Package
Lead Shape
Gull-wing
Pin Count
100
PCB
100
Package Length (mm)
14
Package Width (mm)
14
Package Height (mm)
1
Seated Plane Height (mm)
1.1
Pin Pitch (mm)
0.5
Package Material
Plastic
Mounting
Surface Mount
Jedec
MS-026AED
Family Name
MAX® II
Device Logic Cells
240
Number of User I/Os
80
Number of Logic Blocks/Elements
24
Number of Macro Cells
192
Program Memory Type
Flash
Process Technology
0.18um
Min Operating Temperature
0°C
Max Operating Temperature
85°C
Typical Operating Supply Voltage
1.8V
Min Operating Supply Voltage
1.71V
Programmability
Yes
In-System Programmability
Yes
Speed Grade
5
Compliance
Cage Code
4BA62
EU RoHS
Yes
HTS Code
8542390001
Schedule B
8542390000
Automotive
No
AEC Qualified
No
PPAP
No
Radiation Hardening
No
RoHS Versions
2011/65/EU
Datasheet
Intel EPM240GT100C5NES Datasheet
Download the complete datasheet for Intel EPM240GT100C5NES to view detailed technical specifications.
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