64MB SDRAM DIMM module featuring 168 pins and a 64-bit data bus width. Organized as 8Mx64 with 8 chips per module, each chip is 64M bit and configured as 4Mx16. This unbuffered dual in-line memory module operates at a maximum clock rate of 133 MHz with a CAS latency of 3, utilizing a 3.3V supply voltage. The non-lead-frame SMT package measures 133.48mm (Max) in length and 3.81mm (Max) in width, designed for socket mounting.
PackageUDIMM
MountingSocket
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Technical Specifications
Microchip W3DG648V75D2 technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DIM |
| Package/Case | UDIMM |
| Package Description | Unbuffered Dual In Line Memory Module |
| Lead Shape | No Lead |
| Pin Count | 168 |
| PCB | 168 |
| Package Length (mm) | 133.48(Max) |
| Package Width (mm) | 3.81(Max) |
| Package Height (mm) | 25.4 |
| Mounting | Socket |
| Main Category | DRAM Module |
| Total Density | 64Mbyte |
| Module Type | 168DIMM |
| Maximum Clock Rate | 133MHz |
| Chip Density | 64Mbit |
| Subcategory | SDRAM |
| Data Bus Width | 64bit |
| Number of Chip per Module | 8 |
| Organization | 8Mx64 |
| Chip Package Type | TSOP |
| Typical Operating Supply Voltage | 3.3V |
| Maximum Operating Current | 650mA |
| Min Operating Supply Voltage | 3V |
| Max Operating Supply Voltage | 3.6V |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
| Chip Configuration | 4Mx16 |
| ECC Support | No |
| CAS Latency | 3 |
Compliance
| Cage Code | 60991 |
| HTS Code | 8473301140 |
| Schedule B | 8473300002 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
Datasheet
Microchip W3DG648V75D2 Datasheet
Download the complete datasheet for Microchip W3DG648V75D2 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.