2GB DDR2 SDRAM 240-pin UDIMM module, operating at 800 MHz with a 64-bit data bus width. Features dual ranks and a CAS latency of 6, organized as 128Mx64x2. Utilizes FBGA packaged chips with a 1G bit density, configured as 128Mx8. Operates from a 1.7V to 1.9V supply voltage, with a typical voltage of 1.8V, and functions within a 0°C to 85°C temperature range. The non-lead-frame SMT package is a 240-pin UDIMM, 133.5mm in length, 4mm wide, and 30mm high, with a 1mm pin pitch for socket mounting.
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| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DIM |
| Package/Case | UDIMM |
| Package Description | Unbuffered Dual In Line Memory Module |
| Lead Shape | No Lead |
| Pin Count | 240 |
| PCB | 240 |
| Package Length (mm) | 133.5 |
| Package Width (mm) | 4(Max) |
| Package Height (mm) | 30 |
| Pin Pitch (mm) | 1 |
| Mounting | Socket |
| Main Category | DRAM Module |
| Total Density | 2Gbyte |
| Module Type | 240UDIMM |
| Maximum Clock Rate | 800MHz |
| Chip Density | 1Gbit |
| Subcategory | DDR2 SDRAM |
| Data Bus Width | 64bit |
| Number of Chip per Module | 16 |
| Organization | 128Mx64x2 |
| Chip Package Type | FBGA |
| Typical Operating Supply Voltage | 1.8V |
| Min Operating Supply Voltage | 1.7V |
| Max Operating Supply Voltage | 1.9V |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Chip Configuration | 128Mx8 |
| ECC Support | No |
| Number of Ranks | Dual |
| CAS Latency | 6 |
| Cage Code | 60991 |
| EU RoHS | Yes |
| HTS Code | 8473301140 |
| Schedule B | 8473300002 |
| ECCN | 4A994.a |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2002/95/EC |
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