
32-bit ARM Cortex M3 RISC microcontroller, ROMLess, operating at up to 180 MHz. Features 200KB RAM, 49 programmable I/Os, and 6 timers. Supports multiple interfaces including CAN (2), I2C (2), SPI (4), Ethernet (1), UART (1), USART (3), USB (2), and I2S (2). Includes dual ADCs with 4 channels each and a single 10-bit DAC. Packaged in a 100-pin TFBGA with 0.8mm pitch, suitable for surface mounting. Operates from 2.5V to 3.3V with a maximum supply voltage of 3.6V, across a temperature range of -40°C to 85°C.
NXP LPC1830FET100,551 technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | TFBGA |
| Package Description | Thin Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 100 |
| PCB | 100 |
| Package Length (mm) | 9.1(Max) |
| Package Width (mm) | 9.1(Max) |
| Package Height (mm) | 0.8(Max) |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 0.8 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | LPC1800 |
| Data Bus Width | 32bit |
| Instruction Set Architecture | RISC |
| Maximum Clock Rate | 180MHz |
| Maximum CPU Frequency | 180MHz |
| Device Core | ARM Cortex M3 |
| Program Memory Type | ROMLess |
| RAM Size | 200KB |
| Number of Programmable I/Os | 49 |
| Core Architecture | ARM |
| Programmability | No |
| Number of Timers | 6 |
| Interface Type | CAN/I2C/I2S/Ethernet/SPI/UART/USART/USB |
| CAN | 2 |
| I2C | 2 |
| SPI | 4 |
| Ethernet | 1 |
| UART | 1 |
| USART | 3 |
| USB | 2 |
| I2S | 2 |
| Max Operating Supply Voltage | 3.6V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| ADC Channels | 4/4 |
| Number of ADCs | Dual |
| DAC Channels | 1 |
| DAC Resolution | 10bit |
| Number of DACs | Single |
| Cage Code | H1R01 |
| EU RoHS | Yes |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for NXP LPC1830FET100,551 to view detailed technical specifications.
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