32-bit ARM Cortex-M4/M0 ROMLess MCU featuring up to 264 kB SRAM. This microcontroller offers a 32-bit data bus width and RISC instruction set architecture, powered by an ARM Cortex-M4 device core. It includes 49 programmable I/Os, 6 timers, and versatile interfaces such as CAN, I2C, I2S, SPI, UART, USART, and USB. Peripheral capabilities extend to 8/8 ADC channels and a 10-bit DAC with 1 channel. Packaged in a 100-pin LQFP (Low Profile Quad Flat Package) with gull-wing leads, it is designed for surface mounting.
PackageLQFP
MountingSurface Mount
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Technical Specifications
NXP LPC4320FBD100,551 technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | LQFP |
| Package Description | Low Profile Quad Flat Package |
| Lead Shape | Gull-wing |
| Pin Count | 100 |
| PCB | 100 |
| Package Length (mm) | 14.1(Max) |
| Package Width (mm) | 14.1(Max) |
| Package Height (mm) | 1.45(Max) |
| Seated Plane Height (mm) | 1.6(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-026BED |
| Data Bus Width | 32bit |
| Instruction Set Architecture | RISC |
| Device Core | ARM Cortex M4 |
| Program Memory Type | ROMLess |
| Number of Programmable I/Os | 49 |
| Number of Timers | 6 |
| Interface Type | CAN/I2C/I2S/SPI/UART/USART/USB |
| ADC Channels | 8/8 |
| DAC Channels | 1 |
| DAC Resolution | 10bit |
Compliance
| Cage Code | H1R01 |
| EU RoHS | Yes |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
NXP LPC4320FBD100,551 Datasheet
Download the complete datasheet for NXP LPC4320FBD100,551 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.