32-bit ARM Cortex M4/M0 RISC microcontroller featuring a ROMLess architecture. Operates at a maximum clock rate of 204 MHz with 264KB RAM. Offers 118 programmable I/Os and extensive interfaces including CAN, I2C, SPI, Ethernet, UART, USART, USB, and I2S. Housed in a 180-pin TFBGA package with a 0.8mm pin pitch, suitable for surface mounting. Supports dual ADCs with 8 channels each and a single 10-bit DAC.
PackageTFBGA
MountingSurface Mount
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Technical Specifications
NXP LPC4330FET180,551 technical specifications.
General
Basic Package Type
Ball Grid Array
Package Family Name
BGA
Package/Case
TFBGA
Package Description
Thin Fine Pitch Ball Grid Array
Lead Shape
Ball
Pin Count
180
PCB
180
Package Length (mm)
12
Package Width (mm)
12
Package Height (mm)
0.71
Seated Plane Height (mm)
1.06
Pin Pitch (mm)
0.8
Package Material
Plastic
Mounting
Surface Mount
Family Name
LPC4300
Data Bus Width
32bit
Instruction Set Architecture
RISC
Maximum Clock Rate
204MHz
Maximum CPU Frequency
204MHz
Device Core
ARM Cortex M4/M0
Program Memory Type
ROMLess
RAM Size
264KB
Number of Programmable I/Os
118
Core Architecture
ARM
Programmability
No
Number of Timers
6
Interface Type
CAN/I2C/I2S/Ethernet/SPI/UART/USART/USB
CAN
2
I2C
2
SPI
4
Ethernet
1
UART
1
USART
3
USB
2
I2S
2
Max Operating Supply Voltage
3.6V
Min Operating Temperature
-40°C
Max Operating Temperature
85°C
ADC Channels
8/8
Number of ADCs
Dual
DAC Channels
1
DAC Resolution
10bit
Number of DACs
Single
Compliance
Cage Code
H1R01
EU RoHS
Yes
HTS Code
8542310001
Schedule B
8542310000
ECCN
EAR99
Automotive
No
AEC Qualified
No
PPAP
No
RoHS Versions
2011/65/EU, 2015/863
Datasheet
NXP LPC4330FET180,551 Datasheet
Download the complete datasheet for NXP LPC4330FET180,551 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.