32-bit ARM Cortex M4 RISC microcontroller featuring 512KB Flash program memory and 64KB RAM. Operates at up to 50 MHz with support for I2C, I2S, SPI, UART, and USB interfaces. Packaged in a 121-pin MAP-BGA with a 0.65mm pin pitch, this surface-mount component supports 1.8V, 2.5V, and 3.3V operation. Offers 7 timers, 2 I2C, 2 SPI, 4 UART, and 1 I2S interface, with a single ADC and single DAC. Designed for operation between -40°C and 105°C.
PackageMAP-BGA
MountingSurface Mount
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Technical Specifications
NXP PK21DN512VMB5 technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | MAP-BGA |
| Package Description | Molded Array Process Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 121 |
| PCB | 121 |
| Package Length (mm) | 8 |
| Package Width (mm) | 8 |
| Package Height (mm) | 0.96 |
| Seated Plane Height (mm) | 1.3(Max) |
| Pin Pitch (mm) | 0.65 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | K21 |
| Data Bus Width | 32bit |
| Instruction Set Architecture | RISC |
| Maximum Clock Rate | 50MHz |
| Maximum CPU Frequency | 50MHz |
| Device Core | ARM Cortex M4 |
| Program Memory Type | Flash |
| Program Memory Size | 512KB |
| RAM Size | 64KB |
| Core Architecture | ARM |
| Programmability | Yes |
| Number of Timers | 7 |
| Interface Type | I2C/I2S/SPI/UART/USB |
| CAN | 0 |
| I2C | 2 |
| SPI | 2 |
| Ethernet | 0 |
| UART | 4 |
| USART | 0 |
| USB | 1 |
| I2S | 1 |
| Max Operating Supply Voltage | 3.6V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 105°C |
| Number of ADCs | Single |
| Number of DACs | Single |
Compliance
| Cage Code | H1R01 |
| EU RoHS | Yes |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | 3A991.a.2 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
NXP PK21DN512VMB5 Datasheet
Download the complete datasheet for NXP PK21DN512VMB5 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.