
32-bit ARM Cortex M4 RISC microcontroller featuring a 100 MHz maximum clock rate and 256KB Flash program memory. This MCU offers 132KB RAM, 14 timers, and multiple interfaces including CAN (2), I2C (2), SPI (3), UART (6), and USB (1). Housed in a 144-pin LQFP package with a 0.5mm pin pitch, it supports surface mounting and operates from 1.8V to 3.3V with a maximum supply voltage of 3.6V. Dual ADCs and dual DACs are integrated, with an operating temperature range of -40°C to 105°C.
NXP PK40DX256ZVLQ10 technical specifications.
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | LQFP |
| Package Description | Low Profile Quad Flat Package |
| Lead Shape | Gull-wing |
| Pin Count | 144 |
| PCB | 144 |
| Package Length (mm) | 20 |
| Package Width (mm) | 20 |
| Package Height (mm) | 1.45(Max) |
| Seated Plane Height (mm) | 1.6(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Weight (g) | 1.3191 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-026BFB |
| Family Name | K40 |
| Data Bus Width | 32bit |
| Instruction Set Architecture | RISC |
| Maximum Clock Rate | 100MHz |
| Maximum CPU Frequency | 100MHz |
| Device Core | ARM Cortex M4 |
| Program Memory Type | Flash |
| Program Memory Size | 256KB |
| RAM Size | 132KB |
| Core Architecture | ARM |
| Programmability | Yes |
| Number of Timers | 14 |
| Interface Type | CAN/I2C/I2S/SPI/UART/USB |
| CAN | 2 |
| I2C | 2 |
| SPI | 3 |
| Ethernet | 0 |
| UART | 6 |
| USART | 0 |
| USB | 1 |
| I2S | 1 |
| Max Operating Supply Voltage | 3.6V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 105°C |
| Number of ADCs | Dual |
| Number of DACs | Dual |
| Cage Code | H1R01 |
| EU RoHS | Yes |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | 3A991.a.2 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for NXP PK40DX256ZVLQ10 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.