1-Channel Ethernet PHY, 81-pin LFBGA surface mount component supporting data rates up to 2.5Gbps. Features integrated Clock Data Recovery (CDR) and JTAG support (IEEE 1149.1). Operates with analog and digital power supplies, with typical voltages including 1.2V, 1.25V, 2.5V, and 3.3V. Package dimensions are 9.1mm x 9.1mm x 1.2mm (Max). Operating temperature range is 0°C to 70°C.
PackageLFBGA
MountingSurface Mount
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Technical Specifications
NXP PX1011A-EL1:557 technical specifications.
General
Basic Package Type
Ball Grid Array
Package Family Name
BGA
Package/Case
LFBGA
Package Description
Low Profile Fine Pitch Ball Grid Array
Lead Shape
Ball
Pin Count
81
PCB
81
Package Length (mm)
9.1(Max)
Package Width (mm)
9.1(Max)
Package Height (mm)
1.2(Max)
Package Material
Plastic
Mounting
Surface Mount
Number of Channels per Chip
1
Maximum Data Rate
2.5Gbps
PHY Line Side Interface
No
JTAG Support
Yes
Standard Supported
IEEE 1149.1
Integrated CDR
Yes
Power Supply Type
Analog|Digital
Min Operating Supply Voltage
1.15|1.2V
Min Operating Temperature
0°C
Max Operating Temperature
70°C
Overhead Octet Support
No
Max Operating Supply Voltage
1.25|3.6V
Maximum Supply Current
25mA
Typical Operating Supply Voltage
1.2|1.25|2.5|3.3V
Compliance
Cage Code
H1R01
HTS Code
8542390001
Schedule B
8542390000
ECCN
EAR99
Automotive
No
AEC Qualified
No
PPAP
No
Radiation Hardening
No
RoHS Versions
2002/95/EC
Datasheet
NXP PX1011A-EL1:557 Datasheet
Download the complete datasheet for NXP PX1011A-EL1:557 to view detailed technical specifications.
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