
16-bit RISC microcontroller featuring 256KB Flash program memory and 16KB RAM. This MCU operates at up to 50 MHz, supports dual ADCs with 12 channels each, and includes multiple CAN, I2C, and SPI interfaces. Housed in an 80-pin PQFP surface-mount package with gull-wing leads, it offers 59 programmable I/Os and a single timer. Designed for automotive applications, it operates across a wide temperature range of -40°C to 105°C with supply voltages from 1.8V to 5.5V.
NXP S912XET256J2VAA technical specifications.
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | PQFP |
| Package Description | Plastic Quad Flat Package |
| Lead Shape | Gull-wing |
| Pin Count | 80 |
| PCB | 80 |
| Package Length (mm) | 14.1(Max) |
| Package Width (mm) | 14.1(Max) |
| Package Height (mm) | 2.4(Max) |
| Seated Plane Height (mm) | 2.45(Max) |
| Pin Pitch (mm) | 0.65 |
| Package Weight (g) | 0.9281 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | HCS12X |
| Data Bus Width | 16bit |
| Instruction Set Architecture | RISC |
| Maximum Clock Rate | 50MHz |
| Maximum CPU Frequency | 50MHz |
| Device Core | HCS12X |
| Program Memory Type | Flash |
| Program Memory Size | 256KB |
| RAM Size | 16KB |
| Number of Programmable I/Os | 59 |
| Core Architecture | HCS12X |
| Programmability | Yes |
| Number of Timers | 1 |
| Interface Type | CAN/I2C/SCI/SPI |
| CAN | 3 |
| I2C | 2 |
| SPI | 3 |
| Ethernet | 0 |
| UART | 0 |
| USART | 0 |
| USB | 0 |
| I2S | 0 |
| Max Operating Supply Voltage | 1.98|2.9|5.5V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 105°C |
| ADC Channels | 12/12 |
| Number of ADCs | Dual |
| Cage Code | H1R01 |
| EU RoHS | Yes |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | 3A991.a.2 |
| Automotive | Yes |
| AEC Qualified | Yes |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for NXP S912XET256J2VAA to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.