N-channel enhancement mode power MOSFET with 600V drain-source voltage and 5.5A continuous drain current. Features a TO-251 IPAK package with 3 through-hole leads and a tab, offering a maximum power dissipation of 90W. UniFET II process technology ensures efficient performance with a typical gate charge of 13nC and input capacitance of 550pF. Operating temperature range from -55°C to 150°C.
PackageIPAK
MountingThrough Hole
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Technical Specifications
Onsemi FDU7N60NZTU technical specifications.
General
| Basic Package Type | Through Hole |
| Package Family Name | TO-251 |
| Package/Case | IPAK |
| Package Description | Transistor Outline Package |
| Lead Shape | Through Hole |
| Pin Count | 3 |
| PCB | 3 |
| Tab | Tab |
| Package Length (mm) | 6.8(Max) |
| Package Width (mm) | 2.5(Max) |
| Package Height (mm) | 6.3(Max) |
| Seated Plane Height (mm) | 9.85(Max) |
| Pin Pitch (mm) | 2.29 |
| Package Material | Plastic |
| Mounting | Through Hole |
| Jedec | TO-251 |
| Configuration | Single |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | N |
| Number of Elements per Chip | 1 |
| Process Technology | UniFET II |
| Maximum Drain Source Voltage | 600V |
| Maximum Gate Source Voltage | ±25V |
| Maximum Continuous Drain Current | 5.5A |
| Maximum Gate Threshold Voltage | 5V |
| Maximum Drain Source Resistance | 1250@10VmOhm |
| Typical Gate Charge @ Vgs | 13@10VnC |
| Typical Gate Charge @ 10V | 13nC |
| Typical Input Capacitance @ Vds | 550@25VpF |
| Maximum Power Dissipation | 90000mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
Compliance
| Cage Code | 5V1P1 |
| EU RoHS | Yes with Exemption |
| HTS Code | 8541290095 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Onsemi FDU7N60NZTU Datasheet
Download the complete datasheet for Onsemi FDU7N60NZTU to view detailed technical specifications.
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