Surface mount JK-Master-Slave flip-flop IC, featuring a single ECL logic element with positive-edge triggering. This 8-pin DFN EP package, measuring 2x2x0.95mm with a 0.5mm pin pitch, offers inverting/non-inverting outputs and is designed for ECL logic families. Operating within a temperature range of -40°C to 85°C, it utilizes a non-lead-frame SMT basic package type.
PackageDFN EP
MountingSurface Mount
PolarityInverting/Non-Inverting
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Technical Specifications
Onsemi MC100EL35MNR4G technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DFN |
| Package/Case | DFN EP |
| Package Description | Dual Flat Package No Lead, Exposed Pad |
| Lead Shape | No Lead |
| Pin Count | 8 |
| PCB | 8 |
| Package Length (mm) | 2 |
| Package Width (mm) | 2 |
| Package Height (mm) | 0.95(Max) |
| Seated Plane Height (mm) | 1(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MO-229VCCD-3 |
| Logic Family | ECL |
| Logic Function | JK-Master-Slave Type |
| Process Technology | ECL |
| Number of Elements per Chip | 1 |
| Number of Element Inputs | 2 |
| Number of Element Outputs | 1 |
| Polarity | Inverting/Non-Inverting |
| Triggering Type | Positive-Edge |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
Compliance
| Cage Code | 5V1P1 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Onsemi MC100EL35MNR4G Datasheet
Download the complete datasheet for Onsemi MC100EL35MNR4G to view detailed technical specifications.
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