Positive edge-triggered J-K flip-flop, featuring complementary outputs and a single bit configuration. Operates at frequencies up to 3GHz with a propagation delay of 0.49ns and a turn-on delay time of 410ps. Supports a wide supply voltage range from -3V to 5.5V, with output currents of -50mA (high level) and 50mA (low level). Packaged in an 8-pin SOIC surface-mount format, supplied on tape and reel.
Frequency3GHz
PackageSOIC
MountingSurface Mount
PolarityNon-Inverting
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Technical Specifications
Onsemi MC100EP35DR2 technical specifications.
General
| Package/Case | SOIC |
| Clock Edge Trigger Type | Positive Edge |
| Frequency | 3GHz |
| High Level Output Current | -50mA |
| Input Type | SINGLE-ENDED |
| Lead Free | Contains Lead |
| Logic Function | Flip-Flop |
| Low Level Output Current | 50mA |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | -3V |
| Mount | Surface Mount |
| Number of Bits | 1 |
| Number of Bits per Element | 1 |
| Number of Circuits | 1 |
| Number of Elements | 1 |
| Number of Input Lines | 1 |
| Number of Output Lines | 1 |
| Package Quantity | 1 |
| Packaging | Tape and Reel |
| Polarity | Non-Inverting |
| Propagation Delay | 0.49ns |
| RoHS Compliant | No |
| Series | 100EP |
| Turn-On Delay Time | 410ps |
Compliance
| RoHS | Not Compliant |
Datasheet
Onsemi MC100EP35DR2 Datasheet
Download the complete datasheet for Onsemi MC100EP35DR2 to view detailed technical specifications.
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