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Technical Specifications
NXP LS1012ASN7HKA technical specifications.
General
| Family Name | QorIQ LS1012A |
| Data Bus Width | 64bit |
| Instruction Set Architecture | RISC |
| Device Core | ARM Cortex A53 |
| Maximum Speed | 800MHz |
| Core Architecture | ARM |
| Number of CPU Cores | 1 |
| Interface Type | Ethernet/I2C/I2S/SPI/UART/USB |
| CAN | 0 |
| UART | 2 |
| USART | 0 |
| I2C | 2 |
| SPI | 5 |
| USB | 2 |
| Ethernet | 2 |
| I2S | 5 |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 105°C |
| Instruction Cache Size | 256KB |
| Data Cache Size | 32KB |
| Multiply Accumulate | No |
| Pin Count | 211 |
| Package/Case | FCLGA |
Compliance
| RoHS | Yes |
| RoHS Version | 2011/65/EU, 2015/863 |
Datasheet
NXP LS1012ASN7HKA Datasheet
Download the complete datasheet for NXP LS1012ASN7HKA to view detailed technical specifications.
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