SRAM Chip Async Single 5V 256K-Bit 32K x 8 70ns 28-Pin PDIP
Renesas UPD43256BCZ-70LL technical specifications.
| Access Time-Max | 70ns |
| Density | 262144b |
| I/O Type | COMMON |
| JESD-30 Code | R-PDIP-T28 |
| JESD-609 Code | e0 |
| Max Operating Temperature | 70°C |
| Memory Type | SRAM, |
| Memory Width | 8 |
| Min Operating Temperature | 0°C |
| Max Supply Current | 45mA |
| Number of Words | 32768 |
| Number of Words Code | 32K |
| Organization | 32KX8 |
| Output Characteristics | 3-STATE |
| Package Body Material | Plastic |
| Package Code | DIP |
| Package Equivalence Code | DIP28,.6 |
| Package Shape | Rectangular |
| Package Style | IN-LINEMeter |
| Parallel/Serial | PARALLEL |
| Power Supplies | 5V |
| Qualification Status | Not Qualified |
| RoHS Compliant | No |
| Standby Voltage-Min | 2V |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | No |
| Technology | CMOS |
| Temperature Grade | COMMERCIAL |
| Terminal Finish | Tin |
| Terminal Form | Through Hole |
| Terminal Pitch | 2.54mm |
| Terminal Position | DUAL |
| RoHS | Not Compliant |
No datasheet is available for this part.
