K4B4G1646E-BYMA0CV

DDR3L SDRAM provides 4Gbit memory density organized as 256M x 16 in a 96-ball FBGA package. The device supports DDR3L-1866 operation with a 1.071 ns minimum clock period and 13-13-13 timing, while remaining backward compatible with DDR3L-1600 and DDR3L-1333 speed bins. It operates from 1.35 V with DDR3 1.5 V compatibility and supports differential clock and data strobe signaling, on-die termination, data mask, auto-precharge, ZQ calibration, and asynchronous reset functions. The package is lead-free, halogen-free, and RoHS compliant.