
Zero Delay Buffer 6-Out HSTL/LVCMOS/LVDS/LVPECL Differential 48-Pin LFCSP EP T/R
Quad Input, 10-Output, Dual DPLL, 1 pps Synchronizer and Jitter Cleaner
Quad PLL, Quad Input, 8-output Multiservice Line Card Adaptive Clock Translator

Clock Generator 0.002MHz to 1.25GHz-IN 1250MHz-OUT 72-Pin LFCSP EP T/R

Low Jitter Clock Generator with 14 LVPECL/LVDS/HSTL/29 LVCMOS Outputs

Flexible Clock Translator for GPON, Base Station, SONET/SDH, T1/E1, and Ethernet
IC 750 MHz, OTHER CLOCK GENERATOR, QCC64, 9 X 9 MM, ROHS COMPLIANT, MO-220VMMD, LFCSP-64, Clock Generator