AND-Gated J-K Positive-Edge-Triggered Flip-Flop with Peset and Clear 14-PDIP 0 to 70
IC TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, FF/Latch
Dual D-Type Positive-Edge-Triggered Flip-Flops With Preset And Clear 14-PDIP 0 to 70
Dual 2-Wide 2-Input AND-OR-invert Gates (One Gate Expandable) 14-PDIP 0 to 70
Quad 2-input Positive-NOR buffers with open collector outputs 14-PDIP 0 to 70