The J-Link BASE is a USB-powered JTAG/SWD debug probe supporting a large number of CPU cores. Based on a 32-bit RISC CPU, it can communicate at high speed with the supported target CPUs including ARM7/9/11, Cortex-M/R/A, Microchip PIC32, Renesas RX, and RISC-V. It is supported by all major IDEs and provides a download speed of up to 1 MB/s and target interface speeds up to 15 MHz.
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Segger 8.08.00 technical specifications.
| Target Interface Speed | 15MHz |
| Download Speed | 1.0MB/s |
| Target Voltage Range | 1.2 - 5.0V |
| Host Interface | USB 2.0 Full Speed |
| Target Connector | 20-pin 2.54mm (0.1")pin |
| SWO Sampling Speed | 30MHz |
| Current Supply to Target | 300mA |
| Operating Temperature | +5 to +60°C |
| Dimensions | 100 x 53 x 27mm |
| RoHS | Compliant |
| Ce | Compliant |
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