DDR3 SDRAM Registered DIMM module offering 2GB total density with a 240-pin configuration. Features a 1333 MHz maximum clock rate, 20 ns maximum access time, and 72-bit data bus width. Supports ECC and operates at 1.5V typical supply voltage, with a 9 CAS latency. This module utilizes 18 chips, each with 1G bit density, organized as 256Mx72.
SK Hynix HMT125R7TFR8C-H9 technical specifications.
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DIM |
| Package/Case | RDIMM |
| Package Description | Registered Dual In Line Memory Module |
| Lead Shape | No Lead |
| Pin Count | 240 |
| PCB | 240 |
| Package Length (mm) | 133.35 |
| Package Width (mm) | 3.43(Max) |
| Package Height (mm) | 30 |
| Pin Pitch (mm) | 1 |
| Mounting | Socket |
| Main Category | DRAM Module |
| Total Density | 2Gbyte |
| Module Type | 240RDIMM |
| Maximum Access Time | 20ns |
| Maximum Clock Rate | 1333MHz |
| Chip Density | 1Gbit |
| Subcategory | DDR3 SDRAM |
| Data Bus Width | 72bit |
| Number of Chip per Module | 18 |
| Organization | 256Mx72 |
| Typical Operating Supply Voltage | 1.5V |
| Maximum Operating Current | 2024mA |
| Min Operating Supply Voltage | 1.425V |
| Max Operating Supply Voltage | 1.575V |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Chip Configuration | 128Mx8 |
| ECC Support | Yes |
| Number of Ranks | Dual |
| CAS Latency | 9 |
| Cage Code | 9162F |
| EU RoHS | Yes |
| HTS Code | 8473301140 |
| Schedule B | 8473300002 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Download the complete datasheet for SK Hynix HMT125R7TFR8C-H9 to view detailed technical specifications.
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