Stmicroelectronics
STI5202NUD
620-Pin FBGA SoC, ST40 Microprocessor, 266MHz, 32-bit, Flash, MII/RMII Ethernet
620-pin Fine Pitch Ball Grid Array (FBGA) System on Chip (SoC) for digital TV decoding. Features a 32-bit data bus and a 266 MHz maximum clock rate, powered by an ST40 microprocessor core. Offers extensive connectivity including Ethernet (MII/RMII), I2C, SPI, UART, and USB interfaces. Surface mountable with a 27mm x 27mm plastic package.
PackageFBGA
MountingSurface Mount
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Technical Specifications
Stmicroelectronics STI5202NUD technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 620 |
| PCB | 620 |
| Package Length (mm) | 27 |
| Package Width (mm) | 27 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Device Core | ST40 |
| Maximum Clock Rate | 266MHz |
| Program Memory Type | Flash |
| Data Bus Width | 32bit |
| Maximum Speed | 266MHz |
| Processing Unit | Microprocessor |
| Application | Digital TV decoder |
| Interface Type | Ethernet/I2C/SPI/UART/USB |
| SPI | 1 |
| I2C | 1 |
| I2S | 0 |
| UART | 4 |
| USB | 1 |
| USART | 0 |
| CAN | 0 |
| Ethernet | 1 |
| Programmability | Yes |
| Ethernet Interface Type | MII/RMII |
Compliance
| Cage Code | SCR76 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Stmicroelectronics STI5202NUD Datasheet
Download the complete datasheet for Stmicroelectronics STI5202NUD to view detailed technical specifications.
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