512Mbyte DDR SDRAM SODIMM module, operating at 333 MHz with a 64-bit data bus width. Features 200 pins on a 0.6mm pitch, 67.6mm length, and 27mm height, utilizing a Non-Lead-Frame SMT DIM package for socket mounting. This single-rank module offers 512Mbit chip density with 8 chips per module, organized as 64Mx64, and supports a CAS Latency of 2.5. Operating voltage ranges from 2.3V to 2.7V, with a typical 2.5V, and an operating temperature range of 0°C to 70°C.
Swissbit SDN06464S4B51MT-60CR technical specifications.
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DIM |
| Package/Case | SODIMM |
| Package Description | Small Outline Dual In Line Memory Module |
| Lead Shape | No Lead |
| Pin Count | 200 |
| PCB | 200 |
| Package Length (mm) | 67.6 |
| Package Height (mm) | 27 |
| Pin Pitch (mm) | 0.6 |
| Mounting | Socket |
| Main Category | DRAM Module |
| Total Density | 512Mbyte |
| Module Type | 200SODIMM |
| Maximum Access Time | 0.7ns |
| Maximum Clock Rate | 333MHz |
| Chip Density | 512Mbit |
| Subcategory | DDR SDRAM |
| Data Bus Width | 64bit |
| Number of Chip per Module | 8 |
| Organization | 64Mx64 |
| Typical Operating Supply Voltage | 2.5V |
| Maximum Operating Current | 3240mA |
| Min Operating Supply Voltage | 2.3V |
| Max Operating Supply Voltage | 2.7V |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
| Chip Configuration | 64Mx8 |
| ECC Support | No |
| Number of Ranks | Single |
| CAS Latency | 2.5 |
| Cage Code | SV183 |
| EU RoHS | Yes |
| HTS Code | 8473301140 |
| Schedule B | 8473300002 |
| ECCN | EAR99 |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Swissbit SDN06464S4B51MT-60CR to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.