512Mbyte DDR SDRAM DRAM Module, 200-pin SODIMM form factor. Features 333 MHz clock rate, 64-bit data bus width, and 0.7 ns maximum access time. Operates at 2.5V typical supply voltage, with a 200-pin PCB and 0.6mm pin pitch. Non-lead-frame SMT package with 67.6mm length and 27mm height. Supports single rank configuration and a CAS latency of 2.5.
PackageSODIMM
MountingSocket
Quick Jump:
Technical Specifications
Swissbit SDN06464S4B51MT-60IR technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DIM |
| Package/Case | SODIMM |
| Package Description | Small Outline Dual In Line Memory Module |
| Lead Shape | No Lead |
| Pin Count | 200 |
| PCB | 200 |
| Package Length (mm) | 67.6 |
| Package Height (mm) | 27 |
| Pin Pitch (mm) | 0.6 |
| Mounting | Socket |
| Main Category | DRAM Module |
| Total Density | 512Mbyte |
| Module Type | 200SODIMM |
| Maximum Access Time | 0.7ns |
| Maximum Clock Rate | 333MHz |
| Chip Density | 512Mbit |
| Subcategory | DDR SDRAM |
| Data Bus Width | 64bit |
| Number of Chip per Module | 8 |
| Organization | 64Mx64 |
| Typical Operating Supply Voltage | 2.5V |
| Maximum Operating Current | 3240mA |
| Min Operating Supply Voltage | 2.3V |
| Max Operating Supply Voltage | 2.7V |
| Min Operating Temperature | -25°C |
| Max Operating Temperature | 85°C |
| Chip Configuration | 64Mx8 |
| ECC Support | No |
| Number of Ranks | Single |
| CAS Latency | 2.5 |
Compliance
| Cage Code | SV183 |
| EU RoHS | Yes |
| HTS Code | 8473301140 |
| Schedule B | 8473300002 |
| ECCN | 4A994.a |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Swissbit SDN06464S4B51MT-60IR Datasheet
Download the complete datasheet for Swissbit SDN06464S4B51MT-60IR to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.