DDR SDRAM 512Mbyte 200SODIMM module featuring 200 pins and a 64-bit data bus width. Operates at a maximum clock rate of 266 MHz with a 0.75 ns maximum access time. This module offers 512Mbit chip density, organized as 64Mx64, with a 2.5 CAS latency. It utilizes a Small Outline Dual In Line Memory Module (SODIMM) package with a 67.6mm length and 27mm height, designed for socket mounting. Operating supply voltage ranges from 2.3V to 2.7V, with a typical value of 2.5V.
PackageSODIMM
MountingSocket
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Technical Specifications
Swissbit SDN06464S4B51MT-75WR technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DIM |
| Package/Case | SODIMM |
| Package Description | Small Outline Dual In Line Memory Module |
| Lead Shape | No Lead |
| Pin Count | 200 |
| PCB | 200 |
| Package Length (mm) | 67.6 |
| Package Height (mm) | 27 |
| Pin Pitch (mm) | 0.6 |
| Mounting | Socket |
| Main Category | DRAM Module |
| Total Density | 512Mbyte |
| Module Type | 200SODIMM |
| Maximum Access Time | 0.75ns |
| Maximum Clock Rate | 266MHz |
| Chip Density | 512Mbit |
| Subcategory | DDR SDRAM |
| Data Bus Width | 64bit |
| Number of Chip per Module | 8 |
| Organization | 64Mx64 |
| Typical Operating Supply Voltage | 2.5V |
| Maximum Operating Current | 2800mA |
| Min Operating Supply Voltage | 2.3V |
| Max Operating Supply Voltage | 2.7V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| Chip Configuration | 64Mx8 |
| ECC Support | No |
| Number of Ranks | Single |
| CAS Latency | 2.5 |
Compliance
| Cage Code | SV183 |
| EU RoHS | Yes |
| HTS Code | 8473301140 |
| Schedule B | 8473300002 |
| ECCN | 4A994.a |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Swissbit SDN06464S4B51MT-75WR Datasheet
Download the complete datasheet for Swissbit SDN06464S4B51MT-75WR to view detailed technical specifications.
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