DDR SDRAM module offering 512Mbyte total density with a 200-pin SODIMM form factor. Features a 72-bit data bus width and 64Mx72 organization, operating at a maximum clock rate of 266 MHz with a 0.75 ns maximum access time. Supports ECC and operates with a typical supply voltage of 2.5V, housed in a non-lead-frame SMT package measuring 67.6mm x 4.1mm x 31.75mm.
PackageSODIMM
MountingSocket
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Technical Specifications
Western Digital SL72A8M64M8M-C75EWU technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DIM |
| Package/Case | SODIMM |
| Package Description | Small Outline Dual In Line Memory Module |
| Lead Shape | No Lead |
| Pin Count | 200 |
| PCB | 200 |
| Package Length (mm) | 67.6 |
| Package Width (mm) | 4.1(Max) |
| Package Height (mm) | 31.75 |
| Pin Pitch (mm) | 0.6 |
| Mounting | Socket |
| Main Category | DRAM Module |
| Total Density | 512Mbyte |
| Module Type | 200SODIMM |
| Maximum Access Time | 0.75ns |
| Maximum Clock Rate | 266MHz |
| Chip Density | 512Mbit |
| Subcategory | DDR SDRAM |
| Data Bus Width | 72bit |
| Number of Chip per Module | 9 |
| Organization | 64Mx72 |
| Chip Package Type | TSOP |
| Typical Operating Supply Voltage | 2.5V |
| Maximum Operating Current | 1395mA |
| Min Operating Supply Voltage | 2.3V |
| Max Operating Supply Voltage | 2.7V |
| Chip Configuration | 64Mx8 |
| ECC Support | Yes |
| CAS Latency | 2 |
Compliance
| Cage Code | 0MZJ1 |
| EU RoHS | Yes |
| HTS Code | 8473301140 |
| Schedule B | 8473300002 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Datasheet
Western Digital SL72A8M64M8M-C75EWU Datasheet
Download the complete datasheet for Western Digital SL72A8M64M8M-C75EWU to view detailed technical specifications.
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