Field Programmable Gate Array (FPGA) with 14,579 logic cells and 18,224 registers. Features 576 Kbit RAM, 64 18x18 multipliers, and 32 dedicated DSP blocks. Operates on 1.2V with 45nm process technology and offers 338 maximum user I/Os. This surface-mount device comes in a 484-pin Chip Scale Ball Grid Array (CSBGA) package with a 0.8mm pin pitch. Supports transceiver speeds up to 3.2 Gbps and operates within a temperature range of 0°C to 85°C.
PackageCSBGA
MountingSurface Mount
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Technical Specifications
Xilinx XC6SLX16-2CSG484C technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | CSBGA |
| Package Description | Chip Scale Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 484 |
| PCB | 484 |
| Package Length (mm) | 19 |
| Package Width (mm) | 19 |
| Package Height (mm) | 1.35(Max) |
| Seated Plane Height (mm) | 1.8(Max) |
| Pin Pitch (mm) | 0.8 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 338 |
| Number of Registers | 18224 |
| RAM Bits | 576Kbit |
| Device Logic Cells | 14579 |
| Process Technology | 45nm |
| Number of Multipliers | 64 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 32 |
| Speed Grade | 2 |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 32 |
Compliance
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Xilinx XC6SLX16-2CSG484C Datasheet
Download the complete datasheet for Xilinx XC6SLX16-2CSG484C to view detailed technical specifications.
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