Field Programmable Gate Array (FPGA) featuring 3840 logic cells and 4800 registers. This device offers 216 Kbit of RAM, 12 block RAMs, and 8 dedicated DSP slices, supporting 16 (18x18) multipliers. Fabricated on 45nm technology, it operates at 1.2V and provides up to 232 user I/Os with a transceiver speed of 3.2 Gbps. The FPGA is housed in a 324-pin Chip Scale Ball Grid Array (CSBGA) package with a 0.8mm pin pitch, designed for surface mounting. Operating temperature range is -40°C to 100°C.
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Xilinx XC6SLX4-2CSG324I technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | CSBGA |
| Package Description | Chip Scale Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 324 |
| PCB | 324 |
| Package Length (mm) | 15 |
| Package Width (mm) | 15 |
| Package Height (mm) | 0.9 |
| Seated Plane Height (mm) | 1.5(Max) |
| Pin Pitch (mm) | 0.8 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 232 |
| Number of Registers | 4800 |
| RAM Bits | 216Kbit |
| Device Logic Cells | 3840 |
| Process Technology | 45nm |
| Number of Multipliers | 16 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 100°C |
| Dedicated DSP | 8 |
| Speed Grade | 2 |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 12 |
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
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