Quad analog-to-digital converter provides four 12-bit ADC channels with serial LVDS outputs. The converter operates at up to 65 MSPS from a single 3 V supply and supports 1 V p-p to 2 V p-p differential input ranges. Serialized LVDS outputs run at up to 780 Mbps, with data and frame clock outputs for capture timing. The device dissipates 1,350 mW at 65 MSPS and supports a 3 mW power-down mode. A Pb-free 48-lead LFCSP package is specified for the industrial temperature range of -40°C to +85°C.
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| ADC channels | 4 |
| Resolution | 12bits |
| Maximum sample rate | 65MSPS |
| Available speed grades | 50, 65MSPS |
| Digital output interface | Serial LVDS |
| Maximum LVDS data rate | 780Mbps |
| Data clock output frequency | up to 390MHz |
| Analog supply voltage | 2.7 to 3.6V |
| Nominal supply voltage | 3.0V |
| Differential input voltage range | 1 to 2V p-p |
| Full-power analog bandwidth | 400MHz |
| Signal-to-noise ratio | 69.5 typical to NyquistdB |
| Differential nonlinearity | ±0.3 typicalLSB |
| Integral nonlinearity | ±0.4 typicalLSB |
| Power dissipation at 65 MSPS | 1350mW |
| Power dissipation at 50 MSPS | 985mW |
| Power-down dissipation | 3 typicalmW |
| Operating temperature range | -40 to +85°C |
| Package | 48-lead LFCSP, 7 mm x 7 mm x 0.85 mm with exposed pad |
| Pipeline latency | 10CLK cycles |
| Pb-free | Yes |
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