The dual 12-bit ADC operates from a single 3 V supply over 2.7 V to 3.6 V and supports 20, 40, and 65 MSPS speed grades. It integrates dual sample-and-hold amplifiers, an on-chip voltage reference, differential analog inputs with 500 MHz bandwidth, and a multistage pipelined architecture with output error correction. The converter supports 1 V p-p to 2 V p-p input ranges, offset-binary or twos-complement output format, a clock duty-cycle stabilizer, and an output data multiplex option. Industrial-temperature operation is specified from -40 °C to +85 °C in 64-pin LQFP or 64-pin LF-CSP packages.
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| Converter Type | Analog-to-digital converter |
| Resolution | 12bit |
| Number of ADC Channels | 2 |
| Maximum Sample Rate | 65MSPS |
| Available Sample Rates | 20, 40, 65MSPS |
| Supply Voltage Range | 2.7 to 3.6V |
| Nominal Supply Voltage | 3V |
| SNR | 70 to Nyquist, AD9238-65dB |
| SFDR | 80.5 to Nyquist, AD9238-65dBc |
| Power Dissipation | 300 at 65 MSPSmW/channel |
| Analog Input Type | Differential |
| Analog Input Bandwidth | 500, 3 dBMHz |
| Analog Input Range | 1 to 2V p-p |
| Crosstalk Immunity | >85dB |
| Output Data Format | Offset binary or twos complement |
| Operating Temperature Range | -40 to +85°C |
| Package Options | 64-pin LQFP; 64-pin LF-CSP |
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