Fully integrated synchronous step-down DC-DC converter delivering up to 6A from a 3–20V input. Features fixed 400kHz or 1.5MHz operation, programmable 0.8–12V/10V output ranges, 20µA IQ skip mode, PGOOD, FPWM/skip modes, external sync, dual‑phase capability, and robust protections in a compact 3.5mm × 3.75mm 17‑pin FC2QFN package.
Checking distributor stock and pricing after the page loads.
Sign in to ask questions about the Analog Devices ADPL12006 datasheet using AI. Get instant answers about specifications, features, and technical details, ideal for finding information in larger documents.
Sign In to ChatWidest selection of semiconductors and electronic components in stock and ready to ship ™
| Input voltage range (SUP) | 3 to 20V |
| Output current (max) | 6A |
| Switching frequency options | 400kHz or 1.5MHz (fixed)kHz/MHz |
| External SYNC frequency range | 360–600kHz (400kHz option); 1.215–1.845MHz (1.5MHz option)kHz/MHz |
| Output voltage range | 0.8–12 (400kHz); 0.8–10 (1.5MHz)V |
| Feedback reference | 0.8 (±1.6% typ accuracy in PWM mode)V |
| Quiescent current (skip mode, no load) | 20 (typ)µA |
| Shutdown supply current | 4 (typ), 6 (max)µA |
| High-side MOSFET RDS(on) | 46 typ, 95 max (VBIAS=1.8V, ILX=2A)mΩ |
| Low-side MOSFET RDS(on) | 23 typ, 47 max (VBIAS=1.8V, ILX=2A)mΩ |
| Current limit threshold (high-side) | 7.5 min, 8.75 typ, 10 maxA |
| Negative current limit (low-side) | -3.5 (typ)A |
| PGOOD threshold | 92–96 (rising), 91–95 (falling); debounce 50–140µs% of VOUT |
| UVLO (SUP) rising/falling | 3.025 typ rising; 2.725 typ fallingV |
| BIAS output voltage / UVLO | 1.8; UVLO 1.58 typ (50mV hyst)V |
| Maximum duty cycle (dropout) | 96% |
| Operating junction temperature | -40 to +150°C |
| Storage temperature range | -65 to +150°C |
| ESD rating | HBM ±2kV; CDM ±750VkV/V |
| Absolute maximum ratings (selected) | SUP, EN: -0.3 to +22; BST: -0.3 to +24; LX: -0.3 to SUP+0.3; OUT: -0.3 to +16V |
| Thermal resistance θJA/θJC (JEDEC board) | 38.41 / 10.35°C/W |
| Thermal resistance θJA/θJC (4-layer EV kit) | 29 / 10.51°C/W |
| Control modes | Forced PWM (FPWM) and skip-mode; external synchronization supported |
| Dual-phase capability | Yes; dynamic current sharing via shared VEA; SYNCOUT 180° phase |
| Soft-start time | 2.5 (400kHz), 3.5 (1.5MHz)ms |
| Package dimensions | 3.5 × 3.75 × 0.75; 17 pinsmm |
| Ordering options | ADPL12006AFOA+T (400kHz, adj 0.8–12V); ADPL12006AFOB+T (1.5MHz, adj 0.8–10V) |
| Introduction date (datasheet Rev.0) | 2025-07-22YYYY-MM-DD |
| 1ku list price (manufacturer) | Starting from 0.85USD |
| RoHS | Compliant |
Download the complete datasheet for Analog Devices ADPL12006 to view detailed technical specifications.
The embedded preview will load automatically when this section scrolls into view.
