
High-performance EE PLD featuring 32 macrocells and 960 gates. This CMOS device operates at a maximum frequency of 125MHz with a propagation delay of 10ns. It offers 37 programmable I/Os and is housed in a TQFP package with tin, gold, or matte contact plating. Designed for surface mounting, it supports an operating supply voltage of 5V and is lead-free and RoHS compliant.
Cypress CY37032P44-125AXC technical specifications.
Download the complete datasheet for Cypress CY37032P44-125AXC to view detailed technical specifications.
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