CMOS EE PLD with 64 macrocells, 2000 gates, and 69 programmable I/Os. Features a 10ns propagation delay and operates at a maximum frequency of 125MHz. Surface mountable in a TQFP package with tin, gold, or matte contact plating. Supports a 4.75V to 5.25V operating supply voltage range and is RoHS compliant.
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Cypress CY37064P100-125AXC technical specifications.
| Package/Case | TQFP |
| Contact Plating | Tin, Gold, Matte |
| Frequency | 125MHz |
| Lead Free | Lead Free |
| Max Frequency | 125MHz |
| Max Operating Temperature | 70°C |
| Memory Type | EEPROM, |
| Min Operating Temperature | 0°C |
| Max Supply Current | 10uA |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Mount | Surface Mount |
| Number of Gates | 2000 |
| Number of I/Os | 69 |
| Number of Logic Blocks (LABs) | 4 |
| Number of Logic Elements/Cells | 4 |
| Number of Macro Cells | 64 |
| Number of Macrocells | 64 |
| Number of Programmable I/O | 69 |
| Operating Supply Voltage | 5V |
| Package Quantity | 90 |
| Packaging | Tray |
| Propagation Delay | 10ns |
| Radiation Hardening | No |
| Reach SVHC Compliant | No |
| RoHS Compliant | Yes |
| Series | Ultra37000™ |
| Speed Grade | 125 |
| Turn-On Delay Time | 10ns |
| RoHS | Compliant |
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