
CMOS EE PLD with 64 macrocells, 2000 gates, and 69 programmable I/Os. Features a 10ns propagation delay and operates at a maximum frequency of 125MHz. This surface mount component is housed in a TQFP package with tin, gold, or matte contact plating. It supports an operating supply voltage of 5V, with a range of 4.5V to 5.5V, and operates from -40°C to 85°C.
Cypress CY37064P100-125AXI technical specifications.
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