CMOS EE PLD with 128 macrocells, 3800 gates, and 69 programmable I/Os. Features a 10ns propagation delay and operates at a maximum frequency of 125MHz. Surface mountable in a TQFP-100 package with tin, gold, or matte contact plating. Supports a 4.5V to 5.5V operating supply voltage and is RoHS compliant.
Frequency125MHz
PackageTQFP
MountingSurface Mount
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Technical Specifications
Cypress CY37128P100-125AXI technical specifications.
General
Package/Case
TQFP
Contact Plating
Tin, Gold, Matte
Frequency
125MHz
Lead Free
Lead Free
Max Frequency
125MHz
Max Operating Temperature
85°C
Min Operating Temperature
-40°C
Max Supply Voltage
5.5V
Memory Type
EEPROM,
Min Supply Voltage
4.5V
Mount
Surface Mount
Number of Gates
3800
Number of I/Os
69
Number of Logic Blocks (LABs)
8
Number of Logic Elements/Cells
8
Number of Macro Cells
128
Number of Macrocells
128
Number of Programmable I/O
69
Operating Supply Voltage
5V
Package Quantity
90
Packaging
Tray
Propagation Delay
10ns
RoHS Compliant
Yes
Series
Ultra37000™
Speed Grade
125
Turn-On Delay Time
10ns
Compliance
RoHS
Compliant
Datasheet
Cypress CY37128P100-125AXI Datasheet
Download the complete datasheet for Cypress CY37128P100-125AXI to view detailed technical specifications.
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