CMOS EE PLD with 128 macrocells and 3800 gates. Features 133 programmable I/Os, 12ns propagation delay, and a maximum operating frequency of 100MHz. Operates from a 4.75V to 5.25V supply voltage, with a typical 5V requirement. Packaged in a 160-pin TQFP with tin, matte contact plating, suitable for surface mounting. RoHS compliant and lead-free, with an operating temperature range of 0°C to 70°C.
Frequency100MHz
PackageTQFP
MountingSurface Mount
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Technical Specifications
Cypress CY37128P160-100AXC technical specifications.
General
Package/Case
TQFP
Contact Plating
Tin, Matte
Frequency
100MHz
Lead Free
Lead Free
Max Frequency
100MHz
Max Operating Temperature
70°C
Min Operating Temperature
0°C
Max Supply Voltage
5.25V
Memory Type
EEPROM,
Min Supply Voltage
4.75V
Mount
Surface Mount
Number of Gates
3800
Number of I/Os
133
Number of Logic Blocks (LABs)
8
Number of Logic Elements/Cells
8
Number of Macro Cells
128
Number of Macrocells
128
Number of Programmable I/O
133
Operating Supply Voltage
5V
Package Quantity
80
Packaging
Tray
Propagation Delay
12ns
Radiation Hardening
No
RoHS Compliant
Yes
Series
Ultra37000™
Speed Grade
100
Turn-On Delay Time
12ns
Compliance
RoHS
Compliant
Datasheet
Cypress CY37128P160-100AXC Datasheet
Download the complete datasheet for Cypress CY37128P160-100AXC to view detailed technical specifications.
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