CMOS EE PLD with 128 macrocells and 3800 gates, featuring a 12ns propagation delay and 100MHz maximum frequency. This surface mount device operates from a 4.75V to 5.25V supply, with 69 programmable I/Os. Packaged in a lead-free PQCC84 with tin, matte contact plating, it offers a 0°C to 70°C operating temperature range.
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Cypress CY37128P84-100JXC technical specifications.
| Package/Case | PLCC |
| Contact Plating | Tin, Matte |
| Frequency | 100MHz |
| Lead Free | Lead Free |
| Max Frequency | 100MHz |
| Max Operating Temperature | 70°C |
| Memory Type | EEPROM, |
| Min Operating Temperature | 0°C |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Mount | Surface Mount |
| Number of Gates | 3800 |
| Number of I/Os | 69 |
| Number of Logic Blocks (LABs) | 8 |
| Number of Logic Elements/Cells | 8 |
| Number of Macro Cells | 128 |
| Number of Macrocells | 128 |
| Number of Programmable I/O | 69 |
| Operating Supply Voltage | 5V |
| Package Quantity | 15 |
| Packaging | Rail/Tube |
| Propagation Delay | 12ns |
| Radiation Hardening | No |
| RoHS Compliant | Yes |
| Series | Ultra37000™ |
| Speed Grade | 100 |
| Turn-On Delay Time | 12ns |
| RoHS | Compliant |
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