
CMOS EE PLD with 128 macrocells and 3800 gates, featuring a 12ns propagation delay and 100MHz maximum frequency. This surface mount device operates from a 4.75V to 5.25V supply, with 69 programmable I/Os. Packaged in a lead-free PQCC84 with tin, matte contact plating, it offers a 0°C to 70°C operating temperature range.
Cypress CY37128P84-100JXC technical specifications.
Download the complete datasheet for Cypress CY37128P84-100JXC to view detailed technical specifications.
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