Programmable Logic Device (PLD) featuring 128 macrocells and 69 programmable I/Os. This CMOS device operates at a maximum frequency of 125MHz with a propagation delay of 10ns. It supports a supply voltage range of 3V to 3.6V and is housed in a 100-pin TQFP package for surface mounting. RoHS compliant and lead-free, this PLD is designed for general-purpose applications.
Frequency125MHz
PackageTQFP
MountingSurface Mount
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Technical Specifications
Cypress CY37128VP100-125AXC technical specifications.
General
| Package/Case | TQFP |
| Contact Plating | Tin, Gold, Matte |
| Frequency | 125MHz |
| Lead Free | Lead Free |
| Max Frequency | 125MHz |
| Max Operating Temperature | 70°C |
| Memory Type | EEPROM, |
| Min Operating Temperature | 0°C |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Mount | Surface Mount |
| Number of Gates | 3800 |
| Number of I/Os | 69 |
| Number of Logic Blocks (LABs) | 8 |
| Number of Logic Elements/Cells | 8 |
| Number of Macro Cells | 128 |
| Number of Macrocells | 128 |
| Number of Programmable I/O | 69 |
| Operating Supply Voltage | 3.3V |
| Package Quantity | 90 |
| Packaging | Tray |
| Propagation Delay | 10ns |
| RoHS Compliant | Yes |
| Series | Ultra37000™ |
| Speed Grade | 125 |
| Turn-On Delay Time | 10ns |
Compliance
| RoHS | Compliant |
Datasheet
Cypress CY37128VP100-125AXC Datasheet
Download the complete datasheet for Cypress CY37128VP100-125AXC to view detailed technical specifications.
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