
CMOS EE PLD with 256 macrocells, 7700 gates, and 197 programmable I/Os. Features a 12ns propagation delay and operates at a maximum frequency of 100MHz. This surface mount component is housed in a PBGA256 package and requires an operating supply voltage of 3.3V, with a range of 3V to 3.6V. Maximum operating temperature is 70°C.
Cypress CY37256VP256-100BGC technical specifications.
Download the complete datasheet for Cypress CY37256VP256-100BGC to view detailed technical specifications.
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