
Synchronous SRAM chip, 36M-bit density, organized as 2M words by 18 bits. Features a maximum access time of 0.45 ns and a maximum clock rate of 400 MHz with DDR architecture. Operates at a typical supply voltage of 1.8V, with a range of 1.7V to 1.9V. Packaged in a 165-pin FBGA (Fine Pitch Ball Grid Array) with a 15mm x 13mm footprint, suitable for surface mounting.
Cypress CY7C1248KV18-400BZCT technical specifications.
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