Synchronous SRAM chip, 36M-bit density, featuring a 1M x 36 configuration. Achieves a maximum access time of 0.45 ns and a maximum clock rate of 400 MHz with DDR architecture. Operates at a typical supply voltage of 1.8V, with a range of 1.7V to 1.9V. Packaged in a 165-pin FBGA (Fine Pitch Ball Grid Array) for surface mounting, with dimensions of 15mm x 13mm x 0.89mm and a 1mm pin pitch.
Cypress CY7C1250KV18-400BZXCT technical specifications.
Download the complete datasheet for Cypress CY7C1250KV18-400BZXCT to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.