
Synchronous SRAM chip offering 18M bit density with a 512K x 36 configuration. Features a 3 ns maximum access time and operates at a 200 MHz maximum clock rate with SDR data rate architecture. This surface-mount component utilizes a 165-pin FBGA package with a 1 mm pin pitch, measuring 15 x 13 x 0.89 mm. It supports a 3.3 V typical operating supply voltage and operates across a temperature range of -40 °C to 85 °C.
Cypress CY7C1380DV33-200BZI technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 165 |
| PCB | 165 |
| Package Length (mm) | 15 |
| Package Width (mm) | 13 |
| Package Height (mm) | 0.89 |
| Seated Plane Height (mm) | 1.4(Max) |
| Pin Pitch (mm) | 1 |
| Package Weight (g) | 0.49956 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 18Mbit |
| Address Bus Width | 19bit |
| Maximum Access Time | 3ns |
| Timing Type | Synchronous |
| Maximum Clock Rate | 200MHz |
| Data Rate Architecture | SDR |
| Density in Bits | 18874368bit |
| Maximum Operating Current | 300mA |
| Typical Operating Supply Voltage | 3.3V |
| Number of Bits per Word | 36bit |
| Number of Ports | 4 |
| Number of Words | 512K |
| Min Operating Supply Voltage | 3.135V |
| Max Operating Supply Voltage | 3.6V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| Architecture | Pipelined |
| Cage Code | 65786 |
| EU RoHS | No |
| HTS Code | 8542320041 |
| Schedule B | 8542320040 |
| ECCN | 3A991.b.2.b |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Cypress CY7C1380DV33-200BZI to view detailed technical specifications.
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