
Synchronous SRAM chip, 36M-bit density, featuring a 1M x 36 configuration with a 38-bit address bus. Offers a maximum access time of 0.45 ns and operates at a maximum clock rate of 333 MHz with QDR architecture. This dual-port memory component is housed in a 165-pin FBGA package, designed for surface mounting, and operates at a typical supply voltage of 1.8V.
Cypress CY7C1414KV18-333BZXC technical specifications.
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