Synchronous SRAM chip, 36M bit density, featuring a 2M x 18 configuration. Delivers a maximum access time of 3.2 ns and supports a maximum clock rate of 200 MHz with SDR data rate architecture. This dual-port memory operates at 3.3V, housed in a 100-pin TQFP surface-mount package with a 0.65mm pin pitch. Designed for a wide operating temperature range of -40°C to 85°C.
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Cypress CY7C1462AV33-200AXI technical specifications.
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | TQFP |
| Package Description | Thin Quad Flat Package |
| Lead Shape | Gull-wing |
| Pin Count | 100 |
| PCB | 100 |
| Package Length (mm) | 20 |
| Package Width (mm) | 14 |
| Package Height (mm) | 1.4 |
| Seated Plane Height (mm) | 1.6(Max) |
| Pin Pitch (mm) | 0.65 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-026BHA |
| Density | 36Mbit |
| Address Bus Width | 21bit |
| Maximum Access Time | 3.2ns |
| Timing Type | Synchronous |
| Maximum Clock Rate | 200MHz |
| Data Rate Architecture | SDR |
| Density in Bits | 37748736bit |
| Maximum Operating Current | 425mA |
| Typical Operating Supply Voltage | 3.3V |
| Number of Bits per Word | 18bit |
| Number of Ports | 2 |
| Number of Words | 2M |
| Min Operating Supply Voltage | 3.135V |
| Max Operating Supply Voltage | 3.6V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| Architecture | Pipelined |
| Cage Code | 65786 |
| EU RoHS | Yes |
| HTS Code | 8542320041 |
| Schedule B | 8542320040 |
| ECCN | 3A991.b.2.b |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU |
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