
Synchronous SRAM chip, 72M-bit density, featuring a 2M x 36 configuration. Offers a maximum access time of 6.5 ns and a maximum clock rate of 133 MHz with SDR data rate architecture. This surface-mount component utilizes a 165-pin FBGA package with a 1mm pin pitch, operating at 2.5V. Designed with a flow-through architecture and 4 ports, it supports a 21-bit address bus.
Cypress CY7C1471BV25-133BZXCT technical specifications.
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