Synchronous SRAM chip, 72M-bit density, organized as 2M words x 36 bits. Features a 21-bit address bus, 4 ports, and a maximum access time of 3 ns. Operates at a maximum clock rate of 200 MHz with SDR data rate architecture. Housed in a 165-pin FBGA package with a 17mm x 15mm footprint, designed for surface mounting. Typical operating supply voltage is 2.5V, with a range of 2.375V to 2.625V.
PackageFBGA
MountingSurface Mount
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Technical Specifications
Cypress CY7C1480BV25-200BZXCT technical specifications.
General
Basic Package Type
Ball Grid Array
Package Family Name
BGA
Package/Case
FBGA
Package Description
Fine Pitch Ball Grid Array
Lead Shape
Ball
Pin Count
165
PCB
165
Package Length (mm)
17
Package Width (mm)
15
Package Height (mm)
0.89
Seated Plane Height (mm)
1.4(Max)
Pin Pitch (mm)
1
Package Material
Plastic
Mounting
Surface Mount
Density
72Mbit
Address Bus Width
21bit
Maximum Access Time
3ns
Timing Type
Synchronous
Maximum Clock Rate
200MHz
Data Rate Architecture
SDR
Density in Bits
75497472bit
Maximum Operating Current
450mA
Typical Operating Supply Voltage
2.5V
Number of Bits per Word
36bit
Number of Ports
4
Number of Words
2M
Min Operating Supply Voltage
2.375V
Max Operating Supply Voltage
2.625V
Min Operating Temperature
0°C
Max Operating Temperature
70°C
Architecture
Pipelined
Compliance
Cage Code
65786
EU RoHS
Yes
HTS Code
8542320041
Schedule B
8542320040
ECCN
3A991.b.2.a
Automotive
No
AEC Qualified
No
PPAP
No
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Cypress CY7C1480BV25-200BZXCT Datasheet
Download the complete datasheet for Cypress CY7C1480BV25-200BZXCT to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.