Synchronous SRAM chip, 72M-bit density, featuring a 4M x 18 configuration with a 21-bit address bus. Offers a maximum access time of 0.45 ns and a maximum clock rate of 450 MHz, utilizing QDR data rate architecture. Operates at 1.8V with a voltage range of 1.7V to 1.9V, and supports dual ports. Packaged in a 165-pin FBGA (Fine Pitch Ball Grid Array) for surface mounting, with dimensions of 15mm x 13mm x 0.89mm.
Cypress CY7C1562XV18-450BZCT technical specifications.
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